prikaz prve stranice dokumenta Highly parallel GPU accelerator for HEVC transform and quantization
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Highly parallel GPU accelerator for HEVC transform and quantization
U: Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence. / Ruidan, Su (ur.). Washington, USA: SPIE, 2020. str. 81-86. https://doi.org/10.1117/12.2581228
Čobrnić, Mate; Duspara, Alen; Dragić, Leon; Piljić, Igor; Kovač, Mario

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Čobrnić, M., Duspara, A., Dragić, L., Piljić, I. i Kovač, M. (2020). Highly parallel GPU accelerator for HEVC transform and quantization. U S. Ruidan, (Ur.), Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence (str. 81-86). Washington, USA: SPIE. doi: 10.1117/12.2581228

Čobrnić, Mate, et al. "Highly parallel GPU accelerator for HEVC transform and quantization." Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence, Ur. Su Ruidan, SPIE, 2020, str. 81-86. https://urn.nsk.hr/urn:nbn:hr:168:263496

Čobrnić, Mate, Alen Duspara, Leon Dragić, Igor Piljić i Mario Kovač. "Highly parallel GPU accelerator for HEVC transform and quantization." U Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence, 81-86. Washington, USA: SPIE, 2020. Citirano 18.04.2024.. https://urn.nsk.hr/urn:nbn:hr:168:263496

Čobrnić, M., et al. (2020) 'Highly parallel GPU accelerator for HEVC transform and quantization', u Ruidan, S. (ur.), Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence, SPIE, Washington, USA, str. 81-86. Preuzeto s: https://urn.nsk.hr/urn:nbn:hr:168:263496 (Datum pristupa: 18.04.2024.)

Čobrnić M, Duspara A, Dragić L, Piljić I, Kovač M. Highly parallel GPU accelerator for HEVC transform and quantization. U: S. Ruidan, ur. Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence. Washington, USA: SPIE; 2020. Str. 81-86. [pristupljeno 18.04.2024.] Dostupno na: https://urn.nsk.hr/urn:nbn:hr:168:263496

M. Čobrnić, A. Duspara, L. Dragić, I. Piljić i M. Kovač, "Highly parallel GPU accelerator for HEVC transform and quantization", Proc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence, S. Ruidan, Ur. Washington, USA: SPIE, 2020. [Online] Dostupno na: https://urn.nsk.hr/urn:nbn:hr:168:263496 [Citirano: 18.04.2024.]

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Podaci o radu
Naslov (engleski)Highly parallel GPU accelerator for HEVC transform and quantization
AutorMate Čobrnić https://orcid.org/0000-0002-1422-0392
AutorAlen Duspara
AutorLeon Dragić
AutorIgor Piljić https://orcid.org/0000-0003-2345-0322
AutorMario Kovač
UrednikSu Ruidan
Autorova ustanovaSveučilište u Zagrebu
Fakultet elektrotehnike i računarstva
(Zavod za automatiku i računalno inženjerstvo)
Znanstveno / umjetničko
područje, polje i grana		TEHNIČKE ZNANOSTI
Računarstvo
Arhitektura računalnih sustava
Sažetak (engleski)
When analysing Internet traffic today it can be found that digital video content prevails. Its domination will continue to grow in the upcoming years and reach 82% of all traffic by 2021. If converted to Internet video minutes per second, this equals about one million video minutes per second. Providing and supporting improved compression capability is therefore expected from video processing devices. This will relieve the pressure on storage systems and communication networks while creating preconditions for further development of video services. Transform and quantization is one of the most compute-intensive parts of modern hybrid video coding systems where coding algorithm itself is commonly standardized. High Efficiency Video Coding (HEVC) is state-of-the-art video coding standard which achieves high compression efficiency at the cost of high computational complexity. In this paper we present highly parallel GPU accelerator for HEVC transform and quantization which targets most common heterogeneous computing CPU+GPU system. The accelerator is implemented using CUDA programming model. All the relevant state-of-the-art techniques related to kernel vectorization, shared memory optimization and overlapping data transfers with computation were investigated, customized and carefully combined to obtain a performance efficient solution across all applicable transform sizes. The proposed solution is compared against reference implementation which uses NVIDIA cuBLAS library to perform the same work. Obtained speedup factors for DCI 4K frame are 2.46 times for largest transform size and 130.17 times for smallest transform size what revealed substantial performance gap of this library when targeting GPU of the Kepler architecture. Achieved processing time of frame transform and quantization are up to 4.82 ms.
Ključne riječi (engleski)
Jezikengleski
Vrsta publikacijeZnanstveni rad - Izvorni znanstveni rad
Status objaveObjavljen
Vrsta recenzijeRecenziran - međunarodna recenzija
Verzija publikacijeObjavljena verzija rada (izdavačev PDF)
Naslov zbornikaProc. SPIE 11584, 2020 International Conference on Image, Video Processing and Artificial Intelligence
Brojčani podacivol. 11584, str. 81-86
ISBN9781510639973
e-ISSN1996-756X
DOIhttps://doi.org/10.1117/12.2581228
URN:NBNurn:nbn:hr:168:263496
Datum objave publikacije2020-11-10
ProjektŠifra: 761349
Naziv (hrvatski): TEchnology TRAnsfer via Multinational Application eXperiments
Kratica: TETRAMAX
Pravna nadležnost: eu
Financijer: EC
Linija financiranja: H2020
SkupNaziv: Third International Conference on Image, Video Processing and Artificial Intelligence, 2020, Shanghai, China
Lokacija: Shangai, Kina
Organizator: Shanghai Advanced Research Institute, Chinese Academy of Sciences
Datum početka: 2020-08-21
Datum završetka: 2020-08-23
Vrsta izlaganja: Predavanje
URL dokumentahttps://www.spiedigitallibrary.org/conference-proceedings-of-spie/11584/2581228/Highly-parallel-GPU-accelerator-for-HEVC-transform-and-quantization/10.1117/12.2581228.short
Vrsta resursaTekst
IzdavačSPIE
Mjesto izdavanjaWashington, USA
Prava pristupaOtvoreni pristup
Uvjeti korištenjaIkona licence Zaštićeno autorskim pravom.
Javna napomenaThe work in this paper was partially financed by the MEEP project that has received funding from the European High- Performance Computing Joint Undertaking (JU) under grant agreement No 946002 and by the TETRAMAX project that has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement number 761349.
Datum i vrijeme pohrane2020-12-08 08:36:28